Field of the Invention
The present invention relates to a motor driving circuit and, in particular, to a motor driving circuit which has the effects of reducing charge/discharge periods of the first and third switches of the motor driving unit and reducing switching loss.
Description of Prior Art
With the rapid progress of technology and computer industry, the lightweight electronic product such as a notebook computer has gradually become a mainstream in the market. For such a lightweight electronic product, the heat-dissipation quality often influence the system stability, the product performance, and even the product lifetime. In order to quickly dissipate the heat generated by a computer system, the computer system is often equipped with a fan as a heat-dissipation device such that it can operate normally at proper temperature.
In general, the heat-dissipation fan used in a computer system is driven by the brushless DC motor. Please refer to FIG. 1 in which the currently traditional DC motor driving circuit 1 uses a control chip 10 to transmit a pulse width modulation (PWM) signal to a motor driving unit 12 to drive a motor. However, the PMOS transistor at the upper leg of the motor driving unit 12 has small transconductance, large logic swing amplitude, and long charge/discharge periods, resulting in serious loss of the switch (i.e., the PMOS transistor) and then poor performance of the heat-dissipation fan. The above-mentioned long charge/discharge periods of the PMOS transistor means there is capacitance (or parasitic capacitance) existing between the gate and the source of the PMOS transistor. The charge/discharge periodc associated with the capacitance depends on the driving current. If the driving current is not enough (i.e., a small driving current), the charge/discharge periods associated with the capacitance value will increase, which slows down the switching speed of the PMOS transistor and thus increases the switching loss thereof.
When the PMOS transistor performs the switching at high frequency, the resultant serious switching loss will result in high temperature Tc on the surface of the PMOS transistor and easily cause a problem of insufficient derating of junction temperature Tj.
Therefore, how to overcome the above problems and disadvantages of the prior art is the focus which the inventor and the related manufacturers in this industry have been devoting themselves to.